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authorH. Peter Anvin <hpa@linux.intel.com>2013-01-31 20:22:57 -0800
committerH. Peter Anvin <hpa@linux.intel.com>2013-01-31 20:22:57 -0800
commitb5831174f9d3f12a492deda6374ca96f87b694f8 (patch)
tree96aa46239200021f9545bda5836f7e80a640d88b /drivers/acpi/processor_perflib.c
parent40a1ef95da85843696fc3ebe5fce39b0db32669f (diff)
parent88b62b915b0b7e25870eb0604ed9a92ba4bfc9f7 (diff)
Merge tag 'v3.8-rc6' into x86/urgent
Linux 3.8-rc6 Merged in order to add a documentation update versus new code in upstream. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'drivers/acpi/processor_perflib.c')
-rw-r--r--drivers/acpi/processor_perflib.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 836bfe06904..53e7ac9403a 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -340,6 +340,13 @@ static void amd_fixup_frequency(struct acpi_processor_px *px, int i)
if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
|| boot_cpu_data.x86 == 0x11) {
rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi);
+ /*
+ * MSR C001_0064+:
+ * Bit 63: PstateEn. Read-write. If set, the P-state is valid.
+ */
+ if (!(hi & BIT(31)))
+ return;
+
fid = lo & 0x3f;
did = (lo >> 6) & 7;
if (boot_cpu_data.x86 == 0x10)