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authorLinus Torvalds <torvalds@linux-foundation.org>2014-09-07 20:06:44 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-09-07 20:06:44 -0700
commitcfa7c641ded6e67a8d8fc54bd24f53a60465e68f (patch)
treea6e0e8ca2a804db26d8ca40c125bdf61f7e6ee6a /drivers/ata/ahci_tegra.c
parentb531f5dd9cb84c5ee40156a230f8e28f69083821 (diff)
parent0babe614b6b4c7d1d8e12d7a6dbdac6e2f0df8e2 (diff)
Merge branch 'for-3.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata fixes from Tejun Heo: "Two patches are to add PCI IDs for ICH9 and all others are device specific fixes. Nothing too interesting" * 'for-3.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ahci_xgene: Fix the link down in first attempt for the APM X-Gene SoC AHCI SATA host controller driver. ahci_xgene: Skip the PHY and clock initialization if already configured by the firmware. ahci: add pcid for Marvel 0x9182 controller ata: Disabling the async PM for JMicron chip 363/361 ata_piix: Add Device IDs for Intel 9 Series PCH ahci: Add Device IDs for Intel 9 Series PCH ata: ahci_tegra: Read calibration fuse
Diffstat (limited to 'drivers/ata/ahci_tegra.c')
-rw-r--r--drivers/ata/ahci_tegra.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c
index f1fef74e503..032904402c9 100644
--- a/drivers/ata/ahci_tegra.c
+++ b/drivers/ata/ahci_tegra.c
@@ -18,14 +18,17 @@
*/
#include <linux/ahci_platform.h>
-#include <linux/reset.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
+#include <linux/reset.h>
+
+#include <soc/tegra/fuse.h>
#include <soc/tegra/pmc.h>
+
#include "ahci.h"
#define SATA_CONFIGURATION_0 0x180
@@ -180,9 +183,12 @@ static int tegra_ahci_controller_init(struct ahci_host_priv *hpriv)
/* Pad calibration */
- /* FIXME Always use calibration 0. Change this to read the calibration
- * fuse once the fuse driver has landed. */
- val = 0;
+ ret = tegra_fuse_readl(FUSE_SATA_CALIB, &val);
+ if (ret) {
+ dev_err(&tegra->pdev->dev,
+ "failed to read calibration fuse: %d\n", ret);
+ return ret;
+ }
calib = tegra124_pad_calibration[val & FUSE_SATA_CALIB_MASK];