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authorChris Wilson <chris@chris-wilson.co.uk>2010-12-14 11:34:51 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2010-12-14 11:34:51 +0000
commit9097eef024db4f1850015e837a84aca0aa40a288 (patch)
tree0d2cf4b9ca5e1e58aa38c1225338925e675c4a02 /drivers/char/agp
parentb13c2b96bf15b9dd0f1a45fd788f3a3025c5aec6 (diff)
parent71f4566084eb592fe545f05f7dff41fa9aa42e0b (diff)
Merge branch 'drm-intel-fixes' into drm-intel-next
Diffstat (limited to 'drivers/char/agp')
-rw-r--r--drivers/char/agp/intel-gtt.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 326ca2ef06b..356f73e0d17 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1135,12 +1135,19 @@ static void i9xx_chipset_flush(void)
writel(1, intel_private.i9xx_flush_page);
}
-static void i965_write_entry(dma_addr_t addr, unsigned int entry,
+static void i965_write_entry(dma_addr_t addr,
+ unsigned int entry,
unsigned int flags)
{
+ u32 pte_flags;
+
+ pte_flags = I810_PTE_VALID;
+ if (flags == AGP_USER_CACHED_MEMORY)
+ pte_flags |= I830_PTE_SYSTEM_CACHED;
+
/* Shift high bits down */
addr |= (addr >> 28) & 0xf0;
- writel(addr | I810_PTE_VALID, intel_private.gtt + entry);
+ writel(addr | pte_flags, intel_private.gtt + entry);
}
static bool gen6_check_flags(unsigned int flags)