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authorOlof Johansson <olof@lixom.net>2014-07-19 15:00:14 -0700
committerOlof Johansson <olof@lixom.net>2014-07-19 15:01:08 -0700
commitf57c0e049aa189e9683e2f013594a63bcc4f083f (patch)
treed00c834871818cd00c8bc764da6c94026d7d1cd0 /drivers/clk/samsung/clk-exynos5250.c
parentc6b659c0050429c36e3e805529d68d8680956e1a (diff)
parentfce9e5bb25264153f9f002eada41757118d25ba9 (diff)
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.17" from Kukjin Kim: Most of them are for exynos SoCs, remove useless codes and update for PMU consolidation. - remove unnecessary header file in mach-exynos/pmu.c - remove unused code in mach-exynos/common.h - remove mach-exynos/regs-pmu.h dependency from PD - remove file path from comment section in mach-exynos - move SYSREG definitions into mach-exynos/regs-sys.h - add mapping PMU base address via DT for PMU cleanup - use staic in mach-exynos/common.h - update Samsung UART config options for low-level debug * tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add support for mapping PMU base address via DT ARM: EXYNOS: Remove "linux/bug.h" from pmu.c ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain ARM: EXYNOS: Remove file path from comment section ARM: EXYNOS: Move SYSREG definition into sys-reg specific file ARM: EXYNOS: Make exynos machine_ops as static ARM: EXYNOS: Remove unused code in common.h ARM: debug: Update Samsung UART config options + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/clk/samsung/clk-exynos5250.c')
-rw-r--r--drivers/clk/samsung/clk-exynos5250.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 1fad4c5e3f5..184f64293b2 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -661,7 +661,7 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
GATE(CLK_RTC, "rtc", "div_aclk66", GATE_IP_PERIS, 20, 0, 0),
GATE(CLK_TMU, "tmu", "div_aclk66", GATE_IP_PERIS, 21, 0, 0),
GATE(CLK_SMMU_TV, "smmu_tv", "mout_aclk200_disp1_sub",
- GATE_IP_DISP1, 2, 0, 0),
+ GATE_IP_DISP1, 9, 0, 0),
GATE(CLK_SMMU_FIMD1, "smmu_fimd1", "mout_aclk200_disp1_sub",
GATE_IP_DISP1, 8, 0, 0),
GATE(CLK_SMMU_2D, "smmu_2d", "div_aclk200", GATE_IP_ACP, 7, 0, 0),