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authorEmilio López <emilio@elopez.com.ar>2013-12-23 00:32:32 -0300
committerEmilio López <emilio@elopez.com.ar>2013-12-28 17:07:42 -0300
commit40a5dcba4e79023f0b511dc0ca498bdf9eacb5db (patch)
treecb8669f36dde36c379ae806f3c54e2e1c0d87efb /drivers/clk/sunxi/clk-factors.h
parent0903ea60173fab226a867ceb080b2e0269a6c975 (diff)
clk: sunxi: register factors clocks behind composite
This commit reworks factors clock registration to be done behind a composite clock. This allows us to additionally add a gate, mux or divisors, as it will be needed by some future PLLs. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/sunxi/clk-factors.h')
-rw-r--r--drivers/clk/sunxi/clk-factors.h16
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
index f49851cc438..02e1a43ebac 100644
--- a/drivers/clk/sunxi/clk-factors.h
+++ b/drivers/clk/sunxi/clk-factors.h
@@ -17,11 +17,13 @@ struct clk_factors_config {
u8 pwidth;
};
-struct clk *clk_register_factors(struct device *dev, const char *name,
- const char *parent_name,
- unsigned long flags, void __iomem *reg,
- struct clk_factors_config *config,
- void (*get_factors) (u32 *rate, u32 parent_rate,
- u8 *n, u8 *k, u8 *m, u8 *p),
- spinlock_t *lock);
+struct clk_factors {
+ struct clk_hw hw;
+ void __iomem *reg;
+ struct clk_factors_config *config;
+ void (*get_factors) (u32 *rate, u32 parent, u8 *n, u8 *k, u8 *m, u8 *p);
+ spinlock_t *lock;
+};
+
+extern const struct clk_ops clk_factors_ops;
#endif