diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2014-06-18 15:26:19 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2014-06-18 15:26:19 -0700 |
| commit | 03ab3da3b215bac4ebb093c808d54596e03e3225 (patch) | |
| tree | a42534bb7f314b561b362ad0b5af7eff8dbb9726 /drivers/clocksource/qcom-timer.c | |
| parent | 6229ad278ca74acdbc8bd3a3d469322a3de91039 (diff) | |
| parent | 7171511eaec5bf23fb06078f59784a3a0626b38f (diff) | |
Merge tag 'v3.16-rc1' into x86/cpufeature
Linux 3.16-rc1
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'drivers/clocksource/qcom-timer.c')
| -rw-r--r-- | drivers/clocksource/qcom-timer.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c index e807acf4c66..8d115db1e65 100644 --- a/drivers/clocksource/qcom-timer.c +++ b/drivers/clocksource/qcom-timer.c @@ -26,6 +26,8 @@ #include <linux/of_irq.h> #include <linux/sched_clock.h> +#include <asm/delay.h> + #define TIMER_MATCH_VAL 0x0000 #define TIMER_COUNT_VAL 0x0004 #define TIMER_ENABLE 0x0008 @@ -179,6 +181,15 @@ static u64 notrace msm_sched_clock_read(void) return msm_clocksource.read(&msm_clocksource); } +static unsigned long msm_read_current_timer(void) +{ + return msm_clocksource.read(&msm_clocksource); +} + +static struct delay_timer msm_delay_timer = { + .read_current_timer = msm_read_current_timer, +}; + static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq, bool percpu) { @@ -217,6 +228,8 @@ err: if (res) pr_err("clocksource_register failed\n"); sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); + msm_delay_timer.freq = dgt_hz; + register_current_timer_delay(&msm_delay_timer); } #ifdef CONFIG_ARCH_QCOM |