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authorAlan Cox <alan@linux.intel.com>2012-04-25 14:36:34 +0100
committerDave Airlie <airlied@redhat.com>2012-04-27 09:23:10 +0100
commit642c52fcc98aa441bda8c7d8252e8b9b563b370b (patch)
treeae82b0608f97abf08bbbe9a2a72574be8640cea6 /drivers/gpu/drm/exynos/exynos_drm_plane.h
parent1896344b181549cea0ab38a810f4f8efcd6ecafb (diff)
gma500: read the PLL bits
We need to pull more stuff from the VBT in order to configure the clocking correctly in all cases. Add the relevant bits from the other CDV driver work. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_drm_plane.h')
0 files changed, 0 insertions, 0 deletions