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authorAlan Cox <alan@linux.intel.com>2012-03-08 16:02:05 +0000
committerDave Airlie <airlied@redhat.com>2012-03-10 13:05:44 +0000
commitc6265ff593467d472814aa9f16f89f6c1dc90a5d (patch)
tree2b1b8251a2ddedcbd31a1668f5ecd5a685628a90 /drivers/gpu/drm/gma500/psb_drv.h
parentc715bc1bf422543731b8833e899266b8be982a52 (diff)
gma500: rework register stuff sanely
Rework registers handling to prepare for Medfield. Signed-off-by: Alan Cox <alan@linux.intel.com> [split out from a single big patch] Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/psb_drv.h')
-rw-r--r--drivers/gpu/drm/gma500/psb_drv.h18
1 files changed, 13 insertions, 5 deletions
diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
index dee07e0d7c3..3c0bf7be273 100644
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -337,8 +337,6 @@ struct psb_state {
uint32_t savePFIT_CONTROL;
uint32_t savePaletteA[256];
uint32_t savePaletteB[256];
- uint32_t saveBLC_PWM_CTL2;
- uint32_t saveBLC_PWM_CTL;
uint32_t saveCLOCKGATING;
uint32_t saveDSPARB;
uint32_t saveDSPATILEOFF;
@@ -350,8 +348,6 @@ struct psb_state {
uint32_t savePP_ON_DELAYS;
uint32_t savePP_OFF_DELAYS;
uint32_t savePP_DIVISOR;
- uint32_t saveBSM;
- uint32_t saveVBT;
uint32_t saveBCLRPAT_A;
uint32_t saveBCLRPAT_B;
uint32_t saveDSPALINOFF;
@@ -393,6 +389,16 @@ struct psb_state {
uint32_t savePWM_CONTROL_LOGIC;
};
+struct psb_save_area {
+ uint32_t saveBSM;
+ uint32_t saveVBT;
+ union {
+ struct psb_state psb;
+ };
+ uint32_t saveBLC_PWM_CTL2;
+ uint32_t saveBLC_PWM_CTL;
+};
+
struct psb_ops;
#define PSB_NUM_PIPE 3
@@ -520,7 +526,9 @@ struct drm_psb_private {
/*
* Register state
*/
- struct psb_state regs;
+
+ struct psb_save_area regs;
+
/* MSI reg save */
uint32_t msi_addr;
uint32_t msi_data;