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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-04-04 09:44:39 +0100 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2011-06-09 21:51:16 -0700 |
| commit | e4ffd173a1c2f96b43127c2537dd99d89e759bba (patch) | |
| tree | 932a67f5eebb7884ba6b28a4ebf0893d84a44eec /drivers/gpu/drm/i915/intel_display.c | |
| parent | d5bd144959e639443f387c34989cec7c9efff091 (diff) | |
drm/i915: Add an interface to dynamically change the cache level
[anholt v2: Don't forget that when going from cached to uncached, we
haven't been tracking the write domain from the CPU perspective, since
we haven't needed it for GPU coherency.]
[ickle v3: We also need to make sure we relinquish any fences on older
chipsets and clear the GTT for sane domain tracking.]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
0 files changed, 0 insertions, 0 deletions