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| author | Sinclair Yeh <sinclair.yeh@intel.com> | 2014-02-19 13:09:31 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-03-05 21:30:01 +0100 |
| commit | 47e74f0fd12dca6981cbcbdd710899867115c692 (patch) | |
| tree | 5399d45f013259df85c367061b9d05c3c7c98ab1 /drivers/gpu/drm/i915/intel_fbdev.c | |
| parent | 5abbcca30d69836df38527cb705c15bbe64712f8 (diff) | |
drm/i915: Revert workaround for disabling L3 cache aging on BYT
V2: edit the commit message to contain more info
The W/A spreadsheet says this is still required, but the b-spec says
it's not for BYT-T. So the documentation is not clear. However,
our experience with the other SKUs of BYT-I/M on Android and Linux
suggests that setting this bit actually causes GPU hang for certain
OGL benchmark applications.
Removing this bit completely resolves the GPU hangs.
Signed-off-by: Sinclair Yeh <sinclair.yeh@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fbdev.c')
0 files changed, 0 insertions, 0 deletions