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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-06-13 13:37:50 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-07 11:24:04 +0200
commit29dc7ef3bbd3a78d35154f8b103b2f8a724f7986 (patch)
tree3c32afa5e9bdc649578823c672e232d63aaae1c1 /drivers/gpu/drm/i915/intel_i2c.c
parentd197b7d3480b5c9a3c33b224684fa942d76d1e59 (diff)
drm/i915: Handle 320 vs. 333 MHz cdclk on vlv
Depending on the HPLL frequency one of the supported cdclk frquencies is either 320MHz or 333MHz. Figure out which one it is to accurately pick the minimal required cdclk. This would also avoid a warning from the cdclk code where it compares the actual cdclk read out from the hardware with a value that was calculated using valleyview_calc_cdclk(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
0 files changed, 0 insertions, 0 deletions