diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-01-22 21:33:03 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-29 20:16:08 +0100 |
| commit | afd58e79ffbca550fe09b8cf8aa3ba4924bce7d7 (patch) | |
| tree | be5211f0de0729f11b84a3099bb4e3c4d64c06e3 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 46680e0a43537813097b26126d252f9d05802463 (diff) | |
drm/i915: Clarify WaDisable4x2SubspanOptimization situation for VLV
WaDisable4x2SubspanOptimization isn't listed for VLV in the workaround
database, but BSpec says that the relevant bit must be set. Add a
comment to remind people of this.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6c435e48f55..cb96b0abb24 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4945,6 +4945,10 @@ static void valleyview_init_clock_gating(struct drm_device *dev) I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE); + /* + * BSpec says this must be set, even though + * WaDisable4x2SubspanOptimization isn't listed for VLV. + */ I915_WRITE(CACHE_MODE_1, _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); |