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author | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-11-02 21:07:23 -0700 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 18:09:46 +0100 |
commit | 459108b8cccfeeb965653b51be0160784e51fdc0 (patch) | |
tree | c44a6e796110d4ae0795c763c58351f8be9f8852 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
parent | b1fe6673298113636f356dce8e8ac2a93a579882 (diff) |
drm/i915/bdw: Implement PPGTT clear range
GEN8 PPGTT range clearing is very similar to GEN6 if we assume that our
PDEs are all valid, which they should be.
v2: Rebase on top of the address space refactoring.
v3: Rebase on top of the bool use_scratch addition to the clear_range interface.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
0 files changed, 0 insertions, 0 deletions