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| author | Chon Ming Lee <chon.ming.lee@intel.com> | 2013-09-04 01:30:37 +0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-04 17:34:57 +0200 |
| commit | 9dd4ffdf3936e9cd85a5c856a192134b23b4b2ac (patch) | |
| tree | c8d4e0f8b8cf4a903a7aeddf5562d3582402a584 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | 8807e55b3a1bf7b159dcefa4504e204df364d4a1 (diff) | |
drm/i915: Modify DP set clock to accomodate more eDP timings v2
eDP 1.4 supports 4-5 extra link rates in additional to current 2 link
rate. Create a structure to store the DPLL divisor data to improve
readability.
v2: Fix the gen4_dpll/pch_dpll initialization to C99
designated initializers, and use a single loop for all platforms. (Jani and Daniel)
Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
[danvet: Fix up checkpatch warnings.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
0 files changed, 0 insertions, 0 deletions