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| author | Paul Mundt <lethal@linux-sh.org> | 2012-08-01 13:49:13 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2012-08-01 13:49:13 +0900 |
| commit | 91ba548cfd5cc8ee93b9435527efb8fa4caf5c5e (patch) | |
| tree | c96ed92413044a28d17783e84a8824bfd2437af1 /drivers/gpu/drm/i915/intel_ringbuffer.h | |
| parent | b9ccfda293ee6fca9a89a1584f0900e0627b975e (diff) | |
| parent | 4dc4c51675c137c30838425ecc8d471ff5eb138b (diff) | |
Merge branch 'sh/dmaengine' into sh-latest
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 55d3da26bae..1d3c81fdad9 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -113,9 +113,17 @@ struct intel_ring_buffer { * Do we have some not yet emitted requests outstanding? */ u32 outstanding_lazy_request; + bool gpu_caches_dirty; wait_queue_head_t irq_queue; + /** + * Do an explicit TLB flush before MI_SET_CONTEXT + */ + bool itlb_before_ctx_switch; + struct i915_hw_context *default_context; + struct drm_i915_gem_object *last_context_obj; + void *private; }; |