diff options
| author | Dave Airlie <airlied@redhat.com> | 2013-12-05 09:21:16 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2013-12-05 09:21:16 +1000 |
| commit | c17f5bb529221c7f4c0736e69ceb614da0df2838 (patch) | |
| tree | ec61b082ec390b24cd420d5192da4ace24962b3e /drivers/gpu/drm/nouveau/dispnv04/overlay.c | |
| parent | 10c028e94e6e47dca88b33dcc7f9f16651e2cc90 (diff) | |
| parent | bdefc8cbdfc71ea73e0573dbd2d24c0a68232218 (diff) | |
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes
Fix some pageflip, oopses and some better clock support for some chipsets
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
drm/nv50/disp: min/max are reversed in nv50_crtc_gamma_set()
drm/nouveau/sw: fix oops if gpu has its display block disabled
drm/nouveau: unreference fence after syncing
drm/nouveau/kms: send timestamp data for correct head in flip completion events
drm/nouveau/clk: Add support for NVAA/NVAC
drm/nouveau/fifo: Hook up pause and resume for NV50 and NV84+
drm/nv10/plane: some chipsets don't support NV12
drm/nv10/plane: add downscaling restrictions
drm/nv10/plane: fix format computation
drm/nv04-nv30/clk: provide an empty domain list
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv04/overlay.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/dispnv04/overlay.c | 42 |
1 files changed, 31 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c index 3618ac6b631..32e7064b819 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c +++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c @@ -58,8 +58,8 @@ struct nouveau_plane { }; static uint32_t formats[] = { - DRM_FORMAT_NV12, DRM_FORMAT_UYVY, + DRM_FORMAT_NV12, }; /* Sine can be approximated with @@ -99,13 +99,28 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); struct nouveau_bo *cur = nv_plane->cur; bool flip = nv_plane->flip; - int format = ALIGN(src_w * 4, 0x100); int soff = NV_PCRTC0_SIZE * nv_crtc->index; int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index; - int ret; + int format, ret; + + /* Source parameters given in 16.16 fixed point, ignore fractional. */ + src_x >>= 16; + src_y >>= 16; + src_w >>= 16; + src_h >>= 16; + + format = ALIGN(src_w * 4, 0x100); if (format > 0xffff) - return -EINVAL; + return -ERANGE; + + if (dev->chipset >= 0x30) { + if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1)) + return -ERANGE; + } else { + if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3)) + return -ERANGE; + } ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM); if (ret) @@ -113,12 +128,6 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, nv_plane->cur = nv_fb->nvbo; - /* Source parameters given in 16.16 fixed point, ignore fractional. */ - src_x = src_x >> 16; - src_y = src_y >> 16; - src_w = src_w >> 16; - src_h = src_h >> 16; - nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0); @@ -245,14 +254,25 @@ nv10_overlay_init(struct drm_device *device) { struct nouveau_device *dev = nouveau_dev(device); struct nouveau_plane *plane = kzalloc(sizeof(struct nouveau_plane), GFP_KERNEL); + int num_formats = ARRAY_SIZE(formats); int ret; if (!plane) return; + switch (dev->chipset) { + case 0x10: + case 0x11: + case 0x15: + case 0x1a: + case 0x20: + num_formats = 1; + break; + } + ret = drm_plane_init(device, &plane->base, 3 /* both crtc's */, &nv10_plane_funcs, - formats, ARRAY_SIZE(formats), false); + formats, num_formats, false); if (ret) goto err; |