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authorDave Airlie <airlied@redhat.com>2011-11-11 11:17:43 +0000
committerDave Airlie <airlied@redhat.com>2011-11-11 11:17:43 +0000
commit0007fa2416f350621709880357d2fc50c5233984 (patch)
treea83f90df4b1a8dda7dc1c666071fea8f78b23df7 /drivers/gpu/drm/nouveau/nouveau_bios.c
parenta6778e9e7fb57603f15344ceb30098a3f6b7caf4 (diff)
parent5c79507b2c50ddab8f51bc692e3c0a39e3da2ad6 (diff)
Merge branch 'drm-nouveau-fixes' of git://git.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes
* 'drm-nouveau-fixes' of git://git.freedesktop.org/git/nouveau/linux-2.6: drm/nouveau: Fix bandwidth calculation for DisplayPort drm/nouveau: by default use low bpp framebuffer on low memory cards drm/nv10: Change the BO size threshold determining the memory placement range. drm/nvc0: enable acceleration for nvc1 by default drm/nvc0/gr: fixup the mmio list register writes for 0xc1 drm/nvc1: hacky workaround to fix accel issues drm/nvc0/gr: fix some bugs in grctx generation drm/nvc0: enable acceleration on 0xc8 by default drm/nvc0/vram: skip disabled PBFB subunits drm/nv40/pm: fix issues on igp chipsets, which don't have memory drm/nouveau: testing the wrong variable drm/nvc0/vram: storage type 0xc3 is not compressed drm/nv50: fix stability issue on NV86. drm/nouveau: initialize chan->fence.lock before use drm/nv50/vram: fix incorrect detection of bank count on newer chipsets drm/nv50/gr: typo fix, how about we not reset fifo during graph init? drm/nv50/bios: fixup mpll programming from the init table parser drm/nouveau: fix oops if i2c bus not found in nouveau_i2c_identify() drm: make sure drm_vblank_init() has been called before touching vbl_lock
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bios.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 032a8209813..5fc201b49d3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -640,10 +640,9 @@ static int
nv50_pll_set(struct drm_device *dev, uint32_t reg, uint32_t clk)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t reg0 = nv_rd32(dev, reg + 0);
- uint32_t reg1 = nv_rd32(dev, reg + 4);
struct nouveau_pll_vals pll;
struct pll_lims pll_limits;
+ u32 ctrl, mask, coef;
int ret;
ret = get_pll_limits(dev, reg, &pll_limits);
@@ -654,15 +653,20 @@ nv50_pll_set(struct drm_device *dev, uint32_t reg, uint32_t clk)
if (!clk)
return -ERANGE;
- reg0 = (reg0 & 0xfff8ffff) | (pll.log2P << 16);
- reg1 = (reg1 & 0xffff0000) | (pll.N1 << 8) | pll.M1;
-
- if (dev_priv->vbios.execute) {
- still_alive();
- nv_wr32(dev, reg + 4, reg1);
- nv_wr32(dev, reg + 0, reg0);
+ coef = pll.N1 << 8 | pll.M1;
+ ctrl = pll.log2P << 16;
+ mask = 0x00070000;
+ if (reg == 0x004008) {
+ mask |= 0x01f80000;
+ ctrl |= (pll_limits.log2p_bias << 19);
+ ctrl |= (pll.log2P << 22);
}
+ if (!dev_priv->vbios.execute)
+ return 0;
+
+ nv_mask(dev, reg + 0, mask, ctrl);
+ nv_wr32(dev, reg + 4, coef);
return 0;
}