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authorFrancisco Jerez <currojerez@riseup.net>2010-09-28 20:47:58 +0200
committerBen Skeggs <bskeggs@redhat.com>2010-10-05 09:58:43 +1000
commitcd2fb2e9e0a6a3273d353b18e4bdd21cc0482724 (patch)
tree8f356e8abe542f9f873d84a7e4d7845fd0cb2307 /drivers/gpu/drm/nouveau/nv04_dac.c
parent23357e4da0e1b39c9dfd64a1db0deafc6d70b554 (diff)
drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.
It's an unrelated PLL filtering control bit, leave it alone when changing the CRTC-encoder binding. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_dac.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dac.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index 9cc560c792a..ba6423f2ffc 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -345,14 +345,11 @@ static void nv04_dac_prepare(struct drm_encoder *encoder)
{
struct drm_encoder_helper_funcs *helper = encoder->helper_private;
struct drm_device *dev = encoder->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
int head = nouveau_crtc(encoder->crtc)->index;
- struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
helper->dpms(encoder, DRM_MODE_DPMS_OFF);
nv04_dfp_disable(dev, head);
- crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] = 0;
}
static void nv04_dac_mode_set(struct drm_encoder *encoder,