diff options
| author | Maarten Maathuis <madman2003@gmail.com> | 2010-02-01 20:58:27 +0100 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2010-02-25 15:07:53 +1000 |
| commit | ff9e5279b14dc024599cc705ee199dadb94e90a3 (patch) | |
| tree | 4881498b0c5f0defdc14890783249b0514a8afde /drivers/gpu/drm/nouveau/nv50_fifo.c | |
| parent | 6c42966768b0254f465a8f451333795283f53d22 (diff) | |
drm/nouveau: protect channel create/destroy and irq handler with a spinlock
The nv50 pgraph handler (for example) could reenable pgraph fifo access
and that would be bad when pgraph context is being unloaded (we need the
guarantee a ctxprog isn't running).
Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_fifo.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv50_fifo.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c index 204a79ff10f..369ecb4cee5 100644 --- a/drivers/gpu/drm/nouveau/nv50_fifo.c +++ b/drivers/gpu/drm/nouveau/nv50_fifo.c @@ -243,6 +243,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan) struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_gpuobj *ramfc = NULL; + unsigned long flags; int ret; NV_DEBUG(dev, "ch%d\n", chan->id); @@ -278,6 +279,8 @@ nv50_fifo_create_context(struct nouveau_channel *chan) return ret; } + spin_lock_irqsave(&dev_priv->context_switch_lock, flags); + dev_priv->engine.instmem.prepare_access(dev, true); nv_wo32(dev, ramfc, 0x08/4, chan->pushbuf_base); @@ -306,10 +309,12 @@ nv50_fifo_create_context(struct nouveau_channel *chan) ret = nv50_fifo_channel_enable(dev, chan->id, false); if (ret) { NV_ERROR(dev, "error enabling ch%d: %d\n", chan->id, ret); + spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); nouveau_gpuobj_ref_del(dev, &chan->ramfc); return ret; } + spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); return 0; } |