diff options
| author | Christoph Bumiller <e0425955@student.tuwien.ac.at> | 2013-03-27 22:16:55 +0100 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2013-04-26 15:37:42 +1000 |
| commit | 9685482385001613cbed8788d217ec06adc6f711 (patch) | |
| tree | 1ae68e41a5c1507f1fb66b5b0c0f306c9768db78 /drivers/gpu/drm/nouveau | |
| parent | 7e22e71e80fe35592fbc64a0e382108a8ce28495 (diff) | |
drm/nvc0/gr: add software methods to control some MP regs
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/software/nvc0.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c index a523eaad47e..d698e710ddd 100644 --- a/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c @@ -94,6 +94,32 @@ nvc0_software_mthd_flip(struct nouveau_object *object, u32 mthd, return -EINVAL; } +static int +nvc0_software_mthd_mp_control(struct nouveau_object *object, u32 mthd, + void *args, u32 size) +{ + struct nvc0_software_chan *chan = (void *)nv_engctx(object->parent); + struct nvc0_software_priv *priv = (void *)nv_object(chan)->engine; + u32 data = *(u32 *)args; + + switch (mthd) { + case 0x600: + nv_wr32(priv, 0x419e00, data); /* MP.PM_UNK000 */ + break; + case 0x644: + if (data & ~0x1ffffe) + return -EINVAL; + nv_wr32(priv, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */ + break; + case 0x6ac: + nv_wr32(priv, 0x419eac, data); /* MP.PM_UNK0AC */ + break; + default: + return -EINVAL; + } + return 0; +} + static struct nouveau_omthds nvc0_software_omthds[] = { { 0x0400, 0x0400, nvc0_software_mthd_vblsem_offset }, @@ -101,6 +127,9 @@ nvc0_software_omthds[] = { { 0x0408, 0x0408, nvc0_software_mthd_vblsem_value }, { 0x040c, 0x040c, nvc0_software_mthd_vblsem_release }, { 0x0500, 0x0500, nvc0_software_mthd_flip }, + { 0x0600, 0x0600, nvc0_software_mthd_mp_control }, + { 0x0644, 0x0644, nvc0_software_mthd_mp_control }, + { 0x06ac, 0x06ac, nvc0_software_mthd_mp_control }, {} }; |