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| author | Dave Airlie <airlied@redhat.com> | 2015-03-05 09:21:51 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2015-03-05 09:21:51 +1000 |
| commit | 92eed291e9869371a1b66f0f5fa75a4f4e99a768 (patch) | |
| tree | f0acae0d49a6186345ca49669c970d9844707a43 /drivers/gpu/drm/radeon/evergreen.c | |
| parent | 54c4cd68ed7abd9f245722bee39464d04ddb4cfd (diff) | |
| parent | 77ae5f4b48a0445426c9c1ef7c0f28b717e35d55 (diff) | |
Merge branch 'drm-fixes-4.0' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Radeon fixes for 4.0:
- Fix some fallout from the audio rework
- Fix a possible oops in the CS ioctl
- Fix interlaced modes on DCE8
- Do a posting read in irq_set callbacks to make sure
interrupts are properly flushed through the pci bridge
* 'drm-fixes-4.0' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: fix interlaced modes on DCE8
drm/radeon: fix DRM_IOCTL_RADEON_CS oops
drm/radeon: do a posting read in cik_set_irq
drm/radeon: do a posting read in si_set_irq
drm/radeon: do a posting read in evergreen_set_irq
drm/radeon: do a posting read in r600_set_irq
drm/radeon: do a posting read in rs600_set_irq
drm/radeon: do a posting read in r100_set_irq
radeon/audio: fix DP audio on DCE6
radeon/audio: fix whitespace
drm/radeon: adjust audio callback order
drm/radeon: properly set dto for dp on DCE4/5
drm/radeon/audio: update EDID derived fields in modeset
drm/radeon: don't toggle audio state in modeset
drm/radeon/audio: set mute around state setup
drm/radeon: assign pin in detect
drm/radeon: fix the audio dpms callbacks
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 4c0e24b3bb9..973df064c14 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -4593,6 +4593,9 @@ int evergreen_irq_set(struct radeon_device *rdev) WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, afmt5); WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, afmt6); + /* posting read */ + RREG32(SRBM_STATUS); + return 0; } |