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authorSuman Anna <s-anna@ti.com>2014-02-28 14:42:37 -0600
committerJoerg Roedel <joro@8bytes.org>2014-03-04 17:02:08 +0100
commitb148d5fb2ef7bd1441e95402effe22b7b34f9a73 (patch)
tree5cfd62faffe268c061c1012aff34f8c09097a3e0 /drivers/iommu/omap-iommu2.c
parent3c92748df9941ff8f5be4655a04812ff4d0c7eeb (diff)
iommu/omap: Enable bus-error back on supported iommus
The remoteproc MMUs in OMAP4+ SoCs have some additional debug registers that can give out the PC value in addition to the MMU fault address. The PC value can be extracted properly only on the DSP cores, and is not available on the ARM processors within the IPU sub-systems. Instead, the MMUs have been enhanced to throw a bus-error response back to the IPU processors. This functionality is programmable through the MMU_GP_REG register. The cores are simply stalled if the MMU_GP_REG.BUS_ERR_BACK_EN bit is not set. When set, a bus-error exception is raised allowing the processor to handle it as a bus fault and provide additional debug information. This feature is turned on by default by the driver on iommus supporting it. Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
Diffstat (limited to 'drivers/iommu/omap-iommu2.c')
-rw-r--r--drivers/iommu/omap-iommu2.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/iommu/omap-iommu2.c b/drivers/iommu/omap-iommu2.c
index d745094a69d..5e1ea3b0bf1 100644
--- a/drivers/iommu/omap-iommu2.c
+++ b/drivers/iommu/omap-iommu2.c
@@ -98,6 +98,9 @@ static int omap2_iommu_enable(struct omap_iommu *obj)
iommu_write_reg(obj, pa, MMU_TTB);
+ if (obj->has_bus_err_back)
+ iommu_write_reg(obj, MMU_GP_REG_BUS_ERR_BACK_EN, MMU_GP_REG);
+
__iommu_set_twl(obj, true);
return 0;