diff options
| author | Mark Brown <broonie@linaro.org> | 2013-12-31 12:59:55 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-12-31 12:59:55 +0000 |
| commit | 68066bb378a0504439e046cdb55d88362eb6379d (patch) | |
| tree | 0b60f72ddf7108a63dd4db617b42e07fbae5346d /drivers/irqchip/irq-renesas-intc-irqpin.c | |
| parent | 43f627ac9de42607b2cdcc7a41f2bcc82187e06a (diff) | |
| parent | 802eee95bde72fd0cd0f3a5b2098375a487d1eda (diff) | |
Merge tag 'v3.13-rc6' into spi-dw
To resolve trivial overlaps with fixes.
Linux 3.13-rc6
Diffstat (limited to 'drivers/irqchip/irq-renesas-intc-irqpin.c')
| -rw-r--r-- | drivers/irqchip/irq-renesas-intc-irqpin.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 82cec63a901..3ee78f02e5d 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -149,8 +149,9 @@ static void intc_irqpin_read_modify_write(struct intc_irqpin_priv *p, static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p, int irq, int do_mask) { - int bitfield_width = 4; /* PRIO assumed to have fixed bitfield width */ - int shift = (7 - irq) * bitfield_width; /* PRIO assumed to be 32-bit */ + /* The PRIO register is assumed to be 32-bit with fixed 4-bit fields. */ + int bitfield_width = 4; + int shift = 32 - (irq + 1) * bitfield_width; intc_irqpin_read_modify_write(p, INTC_IRQPIN_REG_PRIO, shift, bitfield_width, @@ -159,8 +160,9 @@ static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p, static int intc_irqpin_set_sense(struct intc_irqpin_priv *p, int irq, int value) { + /* The SENSE register is assumed to be 32-bit. */ int bitfield_width = p->config.sense_bitfield_width; - int shift = (7 - irq) * bitfield_width; /* SENSE assumed to be 32-bit */ + int shift = 32 - (irq + 1) * bitfield_width; dev_dbg(&p->pdev->dev, "sense irq = %d, mode = %d\n", irq, value); |