diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-03-11 10:49:34 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-03-11 10:49:34 +0100 |
commit | d95c3578120e5bc4784069439f00ccb1b5f87717 (patch) | |
tree | c819de31de3983f3d69f223ede07667ff23bf7da /drivers/mmc/core/mmc_ops.c | |
parent | ba1d755a36f66101aa88ac9ebb54694def6ec38d (diff) | |
parent | 78b020d035074fc3aa4d017353bb2c32e2aff56f (diff) |
Merge branch 'x86/core' into cpus4096
Diffstat (limited to 'drivers/mmc/core/mmc_ops.c')
-rw-r--r-- | drivers/mmc/core/mmc_ops.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c index 9c50e6f1c23..34ce2703d29 100644 --- a/drivers/mmc/core/mmc_ops.c +++ b/drivers/mmc/core/mmc_ops.c @@ -248,12 +248,15 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host, sg_init_one(&sg, data_buf, len); - /* - * The spec states that CSR and CID accesses have a timeout - * of 64 clock cycles. - */ - data.timeout_ns = 0; - data.timeout_clks = 64; + if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) { + /* + * The spec states that CSR and CID accesses have a timeout + * of 64 clock cycles. + */ + data.timeout_ns = 0; + data.timeout_clks = 64; + } else + mmc_set_data_timeout(&data, card); mmc_wait_for_req(host, &mrq); |