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authorAuke Kok <auke-jan.h.kok@intel.com>2006-06-27 09:08:17 -0700
committerAuke Kok <juke-jan.h.kok@intel.com>2006-06-27 09:08:17 -0700
commitd37ea5d56293b7a883d2a993df5d8b9fb660ed3b (patch)
treeb0b5120c66c8fc44e93cc3e708de52c6eaed98ad /drivers/net/e1000/e1000_osdep.h
parentab7bc0ad72a12ef8eacc1560c9342aa567f3531d (diff)
e1000: add ich8lan core functions
This implements the core new functions needed for ich8's internal NIC. This includes: * ich8 specific read/write code * flash/nvm access code * software semaphore flag functions * 10/100 PHY (fe - no gigabit speed) support for low-end versions * A workaround for a powerdown sequence problem discovered that affects a small number of motherboard. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Diffstat (limited to 'drivers/net/e1000/e1000_osdep.h')
-rw-r--r--drivers/net/e1000/e1000_osdep.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h
index 048d052be29..2d3e8b06cab 100644
--- a/drivers/net/e1000/e1000_osdep.h
+++ b/drivers/net/e1000/e1000_osdep.h
@@ -127,4 +127,17 @@ typedef enum {
#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS)
+#define E1000_WRITE_ICH8_REG(a, reg, value) ( \
+ writel((value), ((a)->flash_address + reg)))
+
+#define E1000_READ_ICH8_REG(a, reg) ( \
+ readl((a)->flash_address + reg))
+
+#define E1000_WRITE_ICH8_REG16(a, reg, value) ( \
+ writew((value), ((a)->flash_address + reg)))
+
+#define E1000_READ_ICH8_REG16(a, reg) ( \
+ readw((a)->flash_address + reg))
+
+
#endif /* _E1000_OSDEP_H_ */