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authorNobuhiro Iwamatsu <iwamatsu@nigauri.org>2007-05-03 18:56:56 +0900
committerJeff Garzik <jeff@garzik.org>2007-05-08 01:15:35 -0400
commit5125ed914d238cf22783038393ea1e75bc470925 (patch)
treecf676025f6be467d8b8a76de4ad982f7189fdffd /drivers/net/smc91x.h
parent9fd9f9b669ca71f7b3a7709d02d305c3d428d2fe (diff)
smc91x SuperH support
This patch supports SuperH of smc91x. smc91x installed on the board of SuperH comes to work by applying this patch. Please apply this patch . Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/smc91x.h')
-rw-r--r--drivers/net/smc91x.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 7053026d6c7..111f23d0576 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -279,6 +279,40 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
+#elif defined(CONFIG_SUPERH)
+
+#if defined(CONFIG_SH_7780_SOLUTION_ENGINE) || defined(CONFIG_SH_7722_SOLUTION_ENGINE)
+#define SMC_CAN_USE_8BIT 0
+#define SMC_CAN_USE_16BIT 1
+#define SMC_CAN_USE_32BIT 0
+#define SMC_IO_SHIFT 0
+#define SMC_NOWAIT 1
+
+#define SMC_inb(a, r) (inw((a) + ((r)&~1)) >> (8*(r%2)))&0xff
+#define SMC_inw(a, r) inw((a) + (r))
+#define SMC_outb(v, a, r) outw(((inw((a)+((r)&~1))*(0xff<<8*(r%2)))) | ((v)<<(8*(r&2)))), (a) + ((r)&~1))
+
+#define SMC_outw(v, a, r) outw(v, (a) + (r))
+#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
+#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
+
+#else /* BOARDS */
+
+#define SMC_CAN_USE_8BIT 1
+#define SMC_CAN_USE_16BIT 1
+#define SMC_CAN_USE_32BIT 1
+
+#define SMC_inb(a, r) inb((a) + (r))
+#define SMC_inw(a, r) inw((a) + (r))
+#define SMC_outb(v, a, r) outb(v, (a) + (r))
+#define SMC_outw(v, a, r) outw(v, (a) + (r))
+#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
+#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
+
+#endif /* BOARDS */
+
+#define set_irq_type(irq, type) do {} while (0)
+
#elif defined(CONFIG_M32R)
#define SMC_CAN_USE_8BIT 0