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authorJames Morris <jmorris@namei.org>2011-04-19 21:32:41 +1000
committerJames Morris <jmorris@namei.org>2011-04-19 21:32:41 +1000
commitd4ab4e6a23f805abb8fc3cc34525eec3788aeca1 (patch)
treeeefd82c155bc27469a85667d759cd90facf4a6e3 /drivers/net/tokenring/madgemc.c
parentc0fa797ae6cd02ff87c0bfe0d509368a3b45640e (diff)
parent96fd2d57b8252e16dfacf8941f7a74a6119197f5 (diff)
Merge branch 'master'; commit 'v2.6.39-rc3' into next
Diffstat (limited to 'drivers/net/tokenring/madgemc.c')
-rw-r--r--drivers/net/tokenring/madgemc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/tokenring/madgemc.c b/drivers/net/tokenring/madgemc.c
index 785ad1a2157..2bedc0ace81 100644
--- a/drivers/net/tokenring/madgemc.c
+++ b/drivers/net/tokenring/madgemc.c
@@ -73,7 +73,7 @@ static void madgemc_setint(struct net_device *dev, int val);
static irqreturn_t madgemc_interrupt(int irq, void *dev_id);
/*
- * These work around paging, however they don't guarentee you're on the
+ * These work around paging, however they don't guarantee you're on the
* right page.
*/
#define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
@@ -387,7 +387,7 @@ getout:
* both with their own disadvantages...
*
* 1) Read in the SIFSTS register from the TMS controller. This
- * is guarenteed to be accurate, however, there's a fairly
+ * is guaranteed to be accurate, however, there's a fairly
* large performance penalty for doing so: the Madge chips
* must request the register from the Eagle, the Eagle must
* read them from its internal bus, and then take the route
@@ -454,7 +454,7 @@ static irqreturn_t madgemc_interrupt(int irq, void *dev_id)
}
/*
- * Set the card to the prefered ring speed.
+ * Set the card to the preferred ring speed.
*
* Unlike newer cards, the MC16/32 have their speed selection
* circuit connected to the Madge ASICs and not to the TMS380