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| author | Arnd Bergmann <arnd@arndb.de> | 2014-09-05 16:53:56 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-09-05 16:53:56 +0200 |
| commit | 184df9ddaab4a572e61b321abc079ca49155fc12 (patch) | |
| tree | 5c99704d8508224b25552f24959b54772d8eec1e /drivers/pci/host/pcie-designware.h | |
| parent | 647f95fa99b16e7c7854a202e91e6aa22ebeecf4 (diff) | |
| parent | 13298fbbdb3f6a0ef55419dc048e064c7a7b0ef8 (diff) | |
Merge tag 'renesas-kconfig-cleanups-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Pull "Renesas ARM Based SoC Kconfig Cleanups for v3.18" from Simon Horman:
* Update name of "R-Car M2-W" SoC (previously there was no "-W")
* Consolidate Legacy SH_CLK_CPG and CPU_V7 Kconfig
* Only select PM_RMOBILE for legacy case
* Cleanup pm-rcar.o and pm-rmobile.o build using Kconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'renesas-kconfig-cleanups-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791 is now called "R-Car M2-W"
ARM: shmobile: Consolidate Legacy SH_CLK_CPG Kconfig
ARM: shmobile: Consolidate Legacy CPU_V7 Kconfig
ARM: shmobile: Only select PM_RMOBILE for legacy case
ARM: shmobile: Cleanup pm-rmobile.o build using Kconfig
ARM: shmobile: Cleanup pm-rcar.o build using Kconfig
ARM: shmobile: Introduce a Kconfig entry for R-Car Gen2
ARM: shmobile: Introduce a Kconfig entry for R-Car Gen1
ARM: shmobile: Introduce a Kconfig entry for R-Mobile
Includes an update to 3.17-rc2 to avoid a dependency
Diffstat (limited to 'drivers/pci/host/pcie-designware.h')
| -rw-r--r-- | drivers/pci/host/pcie-designware.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h index 77f592faa7b..daf81f922cd 100644 --- a/drivers/pci/host/pcie-designware.h +++ b/drivers/pci/host/pcie-designware.h @@ -36,11 +36,15 @@ struct pcie_port { u8 root_bus_nr; void __iomem *dbi_base; u64 cfg0_base; + u64 cfg0_mod_base; void __iomem *va_cfg0_base; u64 cfg1_base; + u64 cfg1_mod_base; void __iomem *va_cfg1_base; u64 io_base; + u64 io_mod_base; u64 mem_base; + u64 mem_mod_base; struct resource cfg; struct resource io; struct resource mem; @@ -61,8 +65,15 @@ struct pcie_host_ops { u32 val, void __iomem *dbi_base); int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val); + int (*rd_other_conf)(struct pcie_port *pp, struct pci_bus *bus, + unsigned int devfn, int where, int size, u32 *val); + int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus, + unsigned int devfn, int where, int size, u32 val); int (*link_up)(struct pcie_port *pp); void (*host_init)(struct pcie_port *pp); + void (*msi_set_irq)(struct pcie_port *pp, int irq); + void (*msi_clear_irq)(struct pcie_port *pp, int irq); + u32 (*get_msi_data)(struct pcie_port *pp); }; int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val); |