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authorGary Hade <garyhade@us.ibm.com>2007-10-03 15:55:51 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2007-10-12 15:03:17 -0700
commit8fa5913d54f3b1e09948e6a0db34da887e05ff1f (patch)
tree22d64e43f445e140d45966dac65c86b67c94b676 /drivers/pci
parentecb3908046ce9ce7feb44e2c2cf77ccdbe231f70 (diff)
PCI: remove transparent bridge sizing
Remove transparent bridge sizing. Due to code in pci_read_bridge_bases() [drivers/pci/probe.c] the child bus of a transparent bridge already has access to the parent bus resources so transparent bridge sizing appears unnecessary. The bridge sizing includes alignment and granularity adjustments that can cause significantly more memory to be reserved from the parant bus than required by devices on the child bus and allotted by _CRS. Signed-off-by: Gary Hade <gary.hade@us.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/setup-bus.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 5e5191ec8de..401e03c920b 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -472,7 +472,12 @@ void pci_bus_size_bridges(struct pci_bus *bus)
break;
case PCI_CLASS_BRIDGE_PCI:
+ /* don't size subtractive decoding (transparent)
+ * PCI-to-PCI bridges */
+ if (bus->self->transparent)
+ break;
pci_bridge_check_ranges(bus);
+ /* fall through */
default:
pbus_size_io(bus);
/* If the bridge supports prefetchable range, size it