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authorClaudiu Manoil <claudiu.manoil@freescale.com>2013-10-09 20:20:40 +0300
committerDavid S. Miller <davem@davemloft.net>2013-10-09 14:02:02 -0400
commitad3660c242adf34a3f598dd8ba8c8d59811788f3 (patch)
treee06f3be061b04f109cb07cdc84ffd55ed5e420b7 /drivers/scsi/mpt2sas/mpi/mpi2_init.h
parentf606385068afe00683f080555f5d0fa9fb8e1f37 (diff)
gianfar: Enable eTSEC-A002 erratum w/a for all parts
A002 is still in "no plans to fix" state, and applies to all the current P1/P2 parts as well, so it's resonable to enable its workaround by default, for all the soc's with etsec. The impact of not enabling this workaround for affected parts is that under certain conditons (runt frames or even frames with RX error detected at PHY level) during controller reset, the controller might fail to indicate Rx reset (GRS) completion. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/scsi/mpt2sas/mpi/mpi2_init.h')
0 files changed, 0 insertions, 0 deletions