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authorNikith Ganigarakoppal <Nikith.Ganigarakoppal@pmcs.com>2013-10-30 16:23:47 +0530
committerJames Bottomley <JBottomley@Parallels.com>2013-12-02 10:35:52 -0800
commit7d029005484a6125a91a075518b9cfde830bc709 (patch)
tree17fc58a081ffcd246b5f4cf968b0146250a181d7 /drivers/scsi/pm8001/pm8001_hwi.h
parent34a9b81b476ea0fa7a2e7ec642830f690eb093aa (diff)
[SCSI] pm80xx: Resetting the phy state.
Setting the phy state for hard reset response. After sending hard reset for a device ,phy down event sets the phy state to zero but for phy up event it will not set the phy state again.This will cause problem to successive hard resets. Signed-off-by: Nikith.Ganigarakoppal@pmcs.com Signed-off-by: Anandkumar.Santhanam@pmcs.com Reviewed-by: Jack Wang <jinpu.wang@profitbricks.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/pm8001/pm8001_hwi.h')
-rw-r--r--drivers/scsi/pm8001/pm8001_hwi.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/scsi/pm8001/pm8001_hwi.h b/drivers/scsi/pm8001/pm8001_hwi.h
index 6d91e244654..e4867e690c8 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.h
+++ b/drivers/scsi/pm8001/pm8001_hwi.h
@@ -131,6 +131,10 @@
#define LINKRATE_30 (0x02 << 8)
#define LINKRATE_60 (0x04 << 8)
+/* for phy state */
+
+#define PHY_STATE_LINK_UP_SPC 0x1
+
/* for new SPC controllers MEMBASE III is shared between BIOS and DATA */
#define GSM_SM_BASE 0x4F0000
struct mpi_msg_hdr{