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authorIngo Molnar <mingo@elte.hu>2009-09-07 08:19:51 +0200
committerIngo Molnar <mingo@elte.hu>2009-09-07 08:19:51 +0200
commita1922ed661ab2c1637d0b10cde933bd9cd33d965 (patch)
tree0f1777542b385ebefd30b3586d830fd8ed6fda5b /drivers/spi/Kconfig
parent75e33751ca8bbb72dd6f1a74d2810ddc8cbe4bdf (diff)
parentd28daf923ac5e4a0d7cecebae56f3e339189366b (diff)
Merge branch 'tracing/core' into tracing/hw-breakpoints
Conflicts: arch/Kconfig kernel/trace/trace.h Merge reason: resolve the conflicts, plus adopt to the new ring-buffer APIs. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/spi/Kconfig')
-rw-r--r--drivers/spi/Kconfig16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index e8aae227b5e..2c733c27db2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -139,17 +139,15 @@ config SPI_MPC52xx_PSC
This enables using the Freescale MPC52xx Programmable Serial
Controller in master SPI mode.
-config SPI_MPC83xx
- tristate "Freescale MPC83xx/QUICC Engine SPI controller"
- depends on (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL
+config SPI_MPC8xxx
+ tristate "Freescale MPC8xxx SPI controller"
+ depends on FSL_SOC
help
- This enables using the Freescale MPC83xx and QUICC Engine SPI
- controllers in master mode.
+ This enables using the Freescale MPC8xxx SPI controllers in master
+ mode.
- Note, this driver uniquely supports the SPI controller on the MPC83xx
- family of PowerPC processors, plus processors with QUICC Engine
- technology. This driver uses a simple set of shift registers for data
- (opposed to the CPM based descriptor model).
+ This driver uses a simple set of shift registers for data (opposed
+ to the CPM based descriptor model).
config SPI_OMAP_UWIRE
tristate "OMAP1 MicroWire"