diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2015-01-12 10:51:13 +0100 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2015-01-12 10:51:13 +0100 |
commit | 2f5eaf66e580f64032b365a00157b6b58c266b37 (patch) | |
tree | 7852017c864f0eb3833782e2a017952bd8531458 /drivers/spi/spi-cadence.c | |
parent | c291ee622165cb2c8d4e7af63fffd499354a23be (diff) | |
parent | 91d1179212161f220938198b742c328ad38fd0a3 (diff) |
Merge tag 'irqchip-urgent-3.19' of git://git.infradead.org/users/jcooper/linux into irq/urgent
irqchip urgent fixes for v3.19 from Jason Cooper
- mtk-sysirq: Fix error handling
- hip04: Fix cpu map for 16bit value
- gic-v3-its: Clear a warning regarding decimal constants
- omap-intc: Fix legacy DMA regression
- atmel-aic-common: Retain priority when changing type
Diffstat (limited to 'drivers/spi/spi-cadence.c')
-rw-r--r-- | drivers/spi/spi-cadence.c | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 7b811e38c7a..5a6749881ff 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -47,6 +47,7 @@ #define CDNS_SPI_CR_CPHA_MASK 0x00000004 /* Clock Phase Control */ #define CDNS_SPI_CR_CPOL_MASK 0x00000002 /* Clock Polarity Control */ #define CDNS_SPI_CR_SSCTRL_MASK 0x00003C00 /* Slave Select Mask */ +#define CDNS_SPI_CR_PERI_SEL_MASK 0x00000200 /* Peripheral Select Decode */ #define CDNS_SPI_CR_BAUD_DIV_MASK 0x00000038 /* Baud Rate Divisor Mask */ #define CDNS_SPI_CR_MSTREN_MASK 0x00000001 /* Master Enable Mask */ #define CDNS_SPI_CR_MANSTRTEN_MASK 0x00008000 /* Manual TX Enable Mask */ @@ -148,6 +149,11 @@ static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val) */ static void cdns_spi_init_hw(struct cdns_spi *xspi) { + u32 ctrl_reg = CDNS_SPI_CR_DEFAULT_MASK; + + if (xspi->is_decoded_cs) + ctrl_reg |= CDNS_SPI_CR_PERI_SEL_MASK; + cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, CDNS_SPI_ER_DISABLE_MASK); cdns_spi_write(xspi, CDNS_SPI_IDR_OFFSET, @@ -160,8 +166,7 @@ static void cdns_spi_init_hw(struct cdns_spi *xspi) cdns_spi_write(xspi, CDNS_SPI_ISR_OFFSET, CDNS_SPI_IXR_ALL_MASK); - cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, - CDNS_SPI_CR_DEFAULT_MASK); + cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg); cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, CDNS_SPI_ER_ENABLE_MASK); } @@ -516,6 +521,17 @@ static int cdns_spi_probe(struct platform_device *pdev) goto clk_dis_apb; } + ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); + if (ret < 0) + master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS; + else + master->num_chipselect = num_cs; + + ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs", + &xspi->is_decoded_cs); + if (ret < 0) + xspi->is_decoded_cs = 0; + /* SPI controller initializations */ cdns_spi_init_hw(xspi); @@ -534,19 +550,6 @@ static int cdns_spi_probe(struct platform_device *pdev) goto remove_master; } - ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); - - if (ret < 0) - master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS; - else - master->num_chipselect = num_cs; - - ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs", - &xspi->is_decoded_cs); - - if (ret < 0) - xspi->is_decoded_cs = 0; - master->prepare_transfer_hardware = cdns_prepare_transfer_hardware; master->prepare_message = cdns_prepare_message; master->transfer_one = cdns_transfer_one; |