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authorTomi Valkeinen <tomi.valkeinen@ti.com>2012-09-11 11:28:59 +0300
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-09-11 11:28:59 +0300
commit6659145746bcf01ac650c76e5736c5003c2db230 (patch)
treed21884a7f7e20381e908f87c3682026ed6761efc /drivers/video/omap2/dss/sdi.c
parent6cd05430eeab0668c55ff4693ab79ff559b2b5c7 (diff)
parentc1c52848cef52e157468b8879fc3cae23b6f3a99 (diff)
Merge branch 'fbdev-for-linus' of git://github.com/schandinat/linux-2.6
Merge omapfb and OMAP SDI fixes: * OMAPFB: fix framebuffer console colors * OMAPDSS: Fix SDI PLL locking Conflicts: drivers/video/omap2/dss/sdi.c
Diffstat (limited to 'drivers/video/omap2/dss/sdi.c')
-rw-r--r--drivers/video/omap2/dss/sdi.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c
index c87e07ebb16..66c8de4365d 100644
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@ -107,8 +107,21 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
sdi_config_lcd_manager(dssdev);
- dss_sdi_init(sdi.datapairs);
+ /*
+ * LCLK and PCLK divisors are located in shadow registers, and we
+ * normally write them to DISPC registers when enabling the output.
+ * However, SDI uses pck-free as source clock for its PLL, and pck-free
+ * is affected by the divisors. And as we need the PLL before enabling
+ * the output, we need to write the divisors early.
+ *
+ * It seems just writing to the DISPC register is enough, and we don't
+ * need to care about the shadow register mechanism for pck-free. The
+ * exact reason for this is unknown.
+ */
+ dispc_mgr_set_clock_div(dssdev->manager->id,
+ &sdi.mgr_config.clock_info);
+ dss_sdi_init(sdi.datapairs);
r = dss_sdi_enable();
if (r)
goto err_sdi_enable;