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authorRajkumar Manoharan <rmanohar@qca.qualcomm.com>2012-10-25 17:11:31 +0530
committerJohn W. Linville <linville@tuxdriver.com>2012-10-29 15:30:29 -0400
commit1680260226a8fd2aab590319da83ad8e610da9bd (patch)
treecd3366ff5019a0503974b3f7c94b15e5323e6e5b /drivers
parentb7d572e1871df06a96a1c9591c71c5494ff6b624 (diff)
ath9k_hw: Enable hw PLL power save for AR9462
This reduced the power consumption to half in full and network sleep. Cc: stable@vger.kernel.org Cc: Paul Stewart <pstew@chromium.org> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_hw.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 1a36fa26263..0a6b7a3385d 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -219,10 +219,10 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
/* Awake -> Sleep Setting */
INIT_INI_ARRAY(&ah->iniPcieSerdes,
- ar9462_pciephy_pll_on_clkreq_disable_L1_2p0);
+ ar9462_pciephy_clkreq_disable_L1_2p0);
/* Sleep -> Awake Setting */
INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
- ar9462_pciephy_pll_on_clkreq_disable_L1_2p0);
+ ar9462_pciephy_clkreq_disable_L1_2p0);
/* Fast clock modal settings */
INIT_INI_ARRAY(&ah->iniModesFastClock,