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authorLaxman Dewangan <ldewangan@nvidia.com>2012-03-07 16:39:05 +0530
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-03-07 19:28:37 +0000
commitc4632aed3e5b134c55b54af19db49662959384c1 (patch)
treeccf9f4aee9a57f52536aab2db929494c32d63b5a /drivers
parent4adf9beda58364497889c06c1badf129a71d48be (diff)
regulator: tps65910: Configure correct value for VDDCTRL vout reg
As per datasheet, the voltage output is defined as from SEL[6:0] = 3 to 64 (dec) Vout= (SEL[6:0] × 12.5 mV + 562.5 mV) The list_voltage returns the vout as 600mV + selector * 12.5mV and so equivalent VSEL is selector + 3. Adding 3 on selector when configuring VSEL register for VDDCTRL output. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/regulator/tps65910-regulator.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c
index 5c15ba01e9c..40ecf516589 100644
--- a/drivers/regulator/tps65910-regulator.c
+++ b/drivers/regulator/tps65910-regulator.c
@@ -662,7 +662,7 @@ static int tps65910_set_voltage_dcdc(struct regulator_dev *dev,
tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
break;
case TPS65911_REG_VDDCTRL:
- vsel = selector;
+ vsel = selector + 3;
tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
}