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authorAlex Deucher <alexander.deucher@amd.com>2015-03-02 20:36:26 -0500
committerAlex Deucher <alexander.deucher@amd.com>2015-03-03 17:28:26 -0500
commitf957063fee6392bb9365370db6db74dc0b2dce0a (patch)
tree86363b94a4511e5df04dd06266a1b629d71a518f /drivers
parent2afa3265b21ada7583bf4a69defe4539ad4df7cf (diff)
drm/radeon: do a posting read in r100_set_irq
To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/r100.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 279801ca511..04f2514f756 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -728,6 +728,10 @@ int r100_irq_set(struct radeon_device *rdev)
tmp |= RADEON_FP2_DETECT_MASK;
}
WREG32(RADEON_GEN_INT_CNTL, tmp);
+
+ /* read back to post the write */
+ RREG32(RADEON_GEN_INT_CNTL);
+
return 0;
}