diff options
author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 18:22:53 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 18:22:53 +0900 |
commit | 315bb96824149614efe4844ded077a13fc908880 (patch) | |
tree | 3a8db24ec8554d8e56b1460d85cc81b34299b0d7 /include/asm-sh/cpu-features.h | |
parent | a6a31139897a5e539efe7ad3b7bd351fa9673ce8 (diff) |
sh: CPU flags in AT_HWCAP in ELF auxvt.
Encode processor flags in AT_HWCAP in the ELF auxiliary vector.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-features.h')
-rw-r--r-- | include/asm-sh/cpu-features.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h new file mode 100644 index 00000000000..e398947ec01 --- /dev/null +++ b/include/asm-sh/cpu-features.h @@ -0,0 +1,15 @@ +#ifndef __ASM_SH_CPU_FEATURES_H +#define __ASM_SH_CPU_FEATURES_H + +/* + * Processor flags + */ +#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ +#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ +#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ +#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ +#define CPU_HAS_PTEA 0x0020 /* PTEA register */ +#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ + +#endif /* __ASM_SH_CPU_FEATURES_H */ |