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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-07-27 11:35:54 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-07-27 11:35:54 +0100
commit241fc4367b3ca5d407b043599ed980304a70b91f (patch)
tree26fca6996c9b3fe89cf86864681adcffc62aac6c /include/linux/8250_pci.h
parent70db3d91a5228c98603c55fa06c87184a1f9f6db (diff)
[SERIAL] Expose 8250_pci setup/removal/suspend/resume functions
Re-jig the setup/removal/suspend/resume of 8250 pci ports so that they know slightly less about how they're attached to a PCI device. Expose this as the new interface for registering PCI serial ports, as well as the pciserial_board structure and associated flag definitions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/linux/8250_pci.h')
-rw-r--r--include/linux/8250_pci.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/include/linux/8250_pci.h b/include/linux/8250_pci.h
index 5f3ab21b339..192c0ff7a77 100644
--- a/include/linux/8250_pci.h
+++ b/include/linux/8250_pci.h
@@ -1,2 +1,40 @@
+/*
+ * Definitions for PCI support.
+ */
+#define FL_BASE_MASK 0x0007
+#define FL_BASE0 0x0000
+#define FL_BASE1 0x0001
+#define FL_BASE2 0x0002
+#define FL_BASE3 0x0003
+#define FL_BASE4 0x0004
+#define FL_GET_BASE(x) (x & FL_BASE_MASK)
+
+/* Use successive BARs (PCI base address registers),
+ else use offset into some specified BAR */
+#define FL_BASE_BARS 0x0008
+
+/* do not assign an irq */
+#define FL_NOIRQ 0x0080
+
+/* Use the Base address register size to cap number of ports */
+#define FL_REGION_SZ_CAP 0x0100
+
+struct pciserial_board {
+ unsigned int flags;
+ unsigned int num_ports;
+ unsigned int base_baud;
+ unsigned int uart_offset;
+ unsigned int reg_shift;
+ unsigned int first_offset;
+};
+
+struct serial_private;
+
+struct serial_private *
+pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board);
+void pciserial_remove_ports(struct serial_private *priv);
+void pciserial_suspend_ports(struct serial_private *priv);
+void pciserial_resume_ports(struct serial_private *priv);
+
int pci_siig10x_fn(struct pci_dev *dev, int enable);
int pci_siig20x_fn(struct pci_dev *dev, int enable);