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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-12-06 20:29:01 -0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-12-13 18:47:39 +0100
commit96b4026878d9dac71bd4c3d6e05c7fbb16a3e0aa (patch)
tree99bbc7fa03cbcafa398265a9f4391e110a48bddf /include/linux/compiler-gcc3.h
parent4db080f9e93411c3c41ec402244da28e2bbde835 (diff)
drm/i915: change CRTC assertion on LCPLL disable
Currently, PC8 is enabled at modeset_global_resources, which is called after intel_modeset_update_state. Due to this, there's a small race condition on the case where we start enabling PC8, then do a modeset while PC8 is still being enabled. The racing condition triggers a WARN because intel_modeset_update_state will mark the CRTC as enabled, then the thread that's still enabling PC8 might look at the data structure and think that PC8 is being enabled while a pipe is enabled. Despite the WARN, this is not really a bug since we'll wait for the PC8-enabling thread to finish when we call modeset_global_resources. The spec says the CRTC cannot be enabled when we disable LCPLL, so we had a check for crtc->base.enabled. If we change to crtc->active we will still prevent disabling LCPLL while the CRTC is enabled, and we will also prevent the WARN above. This is a replacement for the previous patch named "drm/i915: get/put PC8 when we get/put a CRTC" Testcase: igt/pm_pc8/modeset-lpsp-stress-no-wait Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (cherry picked from commit 798183c54799fbe1e5a5bfabb3a8c0505ffd2149 from -next due to Dave's report.) Reported-by: Dave Jones <davej@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/linux/compiler-gcc3.h')
0 files changed, 0 insertions, 0 deletions