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authorSuresh Siddha <suresh.b.siddha@intel.com>2008-07-10 11:16:57 -0700
committerIngo Molnar <mingo@elte.hu>2008-07-12 08:45:05 +0200
commit75c46fa61bc5b4ccd20a168ff325c58771248fcd (patch)
treeff5abfe689fe732ad73a198e1f3e56b8c4ca6024 /include/linux/dmar.h
parent89027d35aa5b8f45ce0f7fa0911db85b46563da0 (diff)
x64, x2apic/intr-remap: MSI and MSI-X support for interrupt remapping infrastructure
MSI and MSI-X support for interrupt remapping infrastructure. MSI address register will be programmed with interrupt-remapping table entry(IRTE) index and the IRTE will contain information about the vector, cpu destination, etc. For MSI-X, all the IRTE's will be consecutively allocated in the table, and the address registers will contain the starting index to the block and the data register will contain the subindex with in that block. This also introduces a new irq_chip for cleaner irq migration (in the process context as opposed to the current irq migration in the context of an interrupt. interrupt-remapping infrastructure will help us achieve this). As MSI is edge triggered, irq migration is a simple atomic update(of vector and cpu destination) of IRTE and flushing the hardware cache. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux/dmar.h')
-rw-r--r--include/linux/dmar.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index bf41ffa7470..c360c558e59 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -109,6 +109,7 @@ extern int flush_irte(int irq);
extern int free_irte(int irq);
extern int irq_remapped(int irq);
+extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
extern struct intel_iommu *map_ioapic_to_ir(int apic);
#else
#define irq_remapped(irq) (0)