diff options
| author | Anton Vorontsov <cbouatmailru@gmail.com> | 2011-11-25 02:49:45 +0400 |
|---|---|---|
| committer | Anton Vorontsov <cbouatmailru@gmail.com> | 2011-11-25 02:54:59 +0400 |
| commit | 47f0ac2b0a8c7f26b513a2a18045219b030aedf1 (patch) | |
| tree | 27f33a5c1e40ee2a494758c1da2e03e86a09e32c /include/linux/pci.h | |
| parent | 7925231037447d1a9036f31c823d362bf2ef4bb0 (diff) | |
| parent | c3b92c8787367a8bb53d57d9789b558f1295cc96 (diff) | |
Merge tag 'v3.1' from git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git into master
Battery tree missed last merge window, so it became stale enough
so that patches no longer apply as people use pretty recent kernels.
Diffstat (limited to 'include/linux/pci.h')
| -rw-r--r-- | include/linux/pci.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index f27893b3b72..9fc01226055 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -251,7 +251,8 @@ struct pci_dev { u8 revision; /* PCI revision, low byte of class word */ u8 hdr_type; /* PCI header type (`multi' flag masked out) */ u8 pcie_cap; /* PCI-E capability offset */ - u8 pcie_type; /* PCI-E device/port type */ + u8 pcie_type:4; /* PCI-E device/port type */ + u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */ u8 rom_base_reg; /* which config register controls the ROM */ u8 pin; /* which interrupt pin this device uses */ @@ -617,6 +618,17 @@ struct pci_driver { /* these external functions are only available when PCI support is enabled */ #ifdef CONFIG_PCI +extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss); + +enum pcie_bus_config_types { + PCIE_BUS_TUNE_OFF, + PCIE_BUS_SAFE, + PCIE_BUS_PERFORMANCE, + PCIE_BUS_PEER2PEER, +}; + +extern enum pcie_bus_config_types pcie_bus_config; + extern struct bus_type pci_bus_type; /* Do NOT directly access these two variables, unless you are arch specific pci @@ -796,10 +808,13 @@ int pcix_get_mmrbc(struct pci_dev *dev); int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); int pcie_get_readrq(struct pci_dev *dev); int pcie_set_readrq(struct pci_dev *dev, int rq); +int pcie_get_mps(struct pci_dev *dev); +int pcie_set_mps(struct pci_dev *dev, int mps); int __pci_reset_function(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); void pci_update_resource(struct pci_dev *dev, int resno); int __must_check pci_assign_resource(struct pci_dev *dev, int i); +int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); int pci_select_bars(struct pci_dev *dev, unsigned long flags); /* ROM control related routines */ |