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authorKeith Busch <keith.busch@intel.com>2014-03-24 10:46:25 -0600
committerMatthew Wilcox <matthew.r.wilcox@intel.com>2014-04-10 17:03:15 -0400
commit42f614201e80ff4cfb8b285d7190149a8e1e6cec (patch)
tree03a71487b6015ccca44d00053b1643193926f04f /include
parent6eb0d698efa9c2a35ec3ca958699717c603f85ee (diff)
NVMe: per-cpu io queues
The device's IO queues are associated with CPUs, so we can use a per-cpu variable to map the a qid to a cpu. This provides a convienient way to optimally assign queues to multiple cpus when the device supports fewer queues than the host has cpus. The previous implementation may have assigned these poorly in these situations. This patch addresses this by sharing queues among cpus that are "close" together and should have a lower lock contention penalty. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/nvme.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 7c3f85bc10f..f0f95c71968 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -74,12 +74,16 @@ enum {
struct nvme_dev {
struct list_head node;
struct nvme_queue __rcu **queues;
+ unsigned short __percpu *io_queue;
u32 __iomem *dbs;
struct pci_dev *pci_dev;
struct dma_pool *prp_page_pool;
struct dma_pool *prp_small_pool;
int instance;
- int queue_count;
+ unsigned queue_count;
+ unsigned online_queues;
+ unsigned max_qid;
+ int q_depth;
u32 db_stride;
u32 ctrl_config;
struct msix_entry *entry;