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authorMichel Dänzer <michel.daenzer@amd.com>2014-07-31 18:43:49 +0900
committerAlex Deucher <alexander.deucher@amd.com>2014-08-05 08:53:45 -0400
commit72a9987edcedb89db988079a03c9b9c65b6ec9ac (patch)
tree80fb28570b7cf060188bdad013f0aa58b4a25fb0 /lib/memory-notifier-error-inject.c
parent124764f17473479061942429ada2e5e786d5d6ed (diff)
drm/radeon: Always flush the HDP cache before submitting a CS to the GPU
This ensures the GPU sees all previous CPU writes to VRAM, which makes it safe: * For userspace to stream data from CPU to GPU via VRAM instead of GTT * For IBs to be stored in VRAM instead of GTT * For ring buffers to be stored in VRAM instead of GTT, if the HPD flush is performed via MMIO Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'lib/memory-notifier-error-inject.c')
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