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| author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-03-29 12:32:34 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-09 18:04:03 +0200 |
| commit | ccf1c867ce049bf27a1f7172f1a91820b3ceb6e5 (patch) | |
| tree | 232564a6071668eea6bed1b4765620f00da59ef8 /lib/mpi/mpi-add.c | |
| parent | fec9181ca4bd70071807c6839cd73e9346a9e023 (diff) | |
drm/i915: add SSC offsets for SBI access
Different registers are identified by their target id and offset. To
simplify their programming, they are called as <RegisterName><TargetId>.
For example, SSCCTL register accessed through SBI at target id 6 and
offset 0c is called SBI_SSCCTL6.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'lib/mpi/mpi-add.c')
0 files changed, 0 insertions, 0 deletions