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| author | Paolo Bonzini <pbonzini@redhat.com> | 2014-12-04 15:11:11 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-12-05 13:57:17 +0100 |
| commit | 404e0a19e155e2303a081109f3ae5e625ac8030a (patch) | |
| tree | c7ac01f970f148c126b5c17cc2137924b3d7728f /lib/mpi/mpi-internal.h | |
| parent | 412a3c411e6df54179f300e8d8d6247327865a2d (diff) | |
KVM: cpuid: mask more bits in leaf 0xd and subleaves
- EAX=0Dh, ECX=1: output registers EBX/ECX/EDX are reserved.
- EAX=0Dh, ECX>1: output register ECX bit 0 is clear for all the CPUID
leaves we support, because variable "supported" comes from XCR0 and not
XSS. Bits above 0 are reserved, so ECX is overall zero. Output register
EDX is reserved.
Source: Intel Architecture Instruction Set Extensions Programming
Reference, ref. number 319433-022
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Tested-by: Wanpeng Li <wanpeng.li@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'lib/mpi/mpi-internal.h')
0 files changed, 0 insertions, 0 deletions