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| author | Jani Nikula <jani.nikula@intel.com> | 2014-07-04 10:00:37 +0800 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2014-07-04 07:46:09 +0200 |
| commit | c149dcb5c60bfea8871f16dfcc0690255eeb825f (patch) | |
| tree | f117d9197504d5b02fa0d66d685c556ed30b5489 /sound | |
| parent | a12137e779e17413f87026202a890f8143858259 (diff) | |
drm/i915: provide interface for audio driver to query cdclk
For Haswell and Broadwell, if the display power well has been disabled,
the display audio controller divider values EM4 M VALUE and EM5 N VALUE
will have been lost. The CDCLK frequency is required for reprogramming them
to generate 24MHz HD-A link BCLK. So provide a private interface for the
audio driver to query CDCLK.
This is a stopgap solution until a more generic interface between audio
and display drivers has been implemented.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
0 files changed, 0 insertions, 0 deletions