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| author | Bart Van Assche <bvanassche@acm.org> | 2010-11-26 13:22:48 -0500 |
|---|---|---|
| committer | David Dillow <dillowda@ornl.gov> | 2011-01-05 15:24:25 -0500 |
| commit | dcb4cb85f4b7caac9769bce464fef16306a4758c (patch) | |
| tree | 1c21889c8b778415f9a8d46fcf28853eb42ede18 /tools/perf/scripts/python/Perf-Trace-Util/Context.c | |
| parent | 9709f0e05b827049733f439de82a4a1688b37b86 (diff) | |
IB/srp: allow lockless work posting
Only one CPU at a time will own an RX IU, so using the address of the IU
as the work request cookie allows us to avoid taking a lock. We can
similarly prepare the TX path for lockless posting by moving the free TX
IUs to a list. This also removes the requirement that the queue sizes be
a power of 2.
Signed-off-by: Bart Van Assche <bvanassche@acm.org>
[ broken out, small cleanups, and modified to avoid needing an extra field
in the IU by David Dillow]
Signed-off-by: David Dillow <dillowda@ornl.gov>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/Context.c')
0 files changed, 0 insertions, 0 deletions