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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-06-05 13:34:09 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-06-10 19:48:56 +0200 |
| commit | 1188739757d0e78810de5fe83dbe0128f624b9e8 (patch) | |
| tree | 5058d0c6a7b5b3c8461bb74f62b7858d3e0c7ecb /tools/perf/scripts/python/check-perf-trace.py | |
| parent | a43f6e0fd6219e806268d5fef67db722875393a0 (diff) | |
drm/i915: refactor PCH_DPLL_SEL #defines
The bits are evenly space, so we can cut down on two big switch
blocks. This also greatly simplifies the hw state readout which
follows in the next patch.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions