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authorVinod Koul <vinod.koul@intel.com>2014-07-09 14:57:49 +0530
committerMark Brown <broonie@linaro.org>2014-07-14 19:44:47 +0100
commit1ad0e33060a64121c1c7acb7ec21a4fdef4aaed6 (patch)
treea431fd4cb3d642e272016ee894aa67fddf0ecabe /tools/perf/scripts/python/check-perf-trace.py
parent85e63007bbef7abc7145c807ed59d01738e09d39 (diff)
ASoC: Intel: add sst shim register start-end variables
the shim registers start and end can be useful while parsing the shim addresses, so add these Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
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